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coyotic_good the6p4c Reminds me of when our PLL on the chip went 2x faster when it was rotated 90 degrees. Every chip. That’s when understood the universe was a complicated, mean, and random place.Permalink On twitter.com
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coyotic_good the6p4c Ok well everyone wants to know what happened here. This was back in the 65 nm days and one of my groups PLLs was put rotated on the chip. No problem, right?Permalink On twitter.com
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coyotic_good the6p4c Well, problem, because whatever weird lithography magic they were using seemed to make the gates shorter (we think) when rotated. In most circuits, who cares. But analog is feisty, and PLLs are the most feisty of the analog circuits.Permalink On twitter.com
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coyotic_good the6p4c I was most proud of the fact that that motherfucker still locked. It just went too fast for the rest of the chip. Which sounds like a them problem. My suggestion, “Just turn up the divide.” was not well received. (The PLL team thought it was funny)Permalink On twitter.com
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coyotic_good the6p4c The also didn’t want to change the floor plan very much so we wound up rotating the PLL and moving the pins for them so it still lined up. Score for the PLL being square at the time.Permalink On twitter.com
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coyotic_good the6p4c So we never did quite figure out exactly why this happened. But everyone was too scared to rotate the PLL ever again.On twitter.com